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FPGA/DSP Design Engineer

  • On-site
    • Warsaw, Mazowieckie, Poland
  • Product

Job description

Your work matters with us. We are a dynamic company implementing next-generation telecommunications technologies for global markets. We are looking for a Junior/Mid FPGA Engineer to join our growing team and contribute to the implementation of functionalities for the 5G mmWave Radio Unit. Responsibilities:

  • Working on the newest technologies within 6G standardization.
  • Designing and developing FPGA-based solutions for 5G mmWave communication systems,
  • Collaborating with other engineers and project managers to ensure timely and successful project completion,
  • Participating in project planning and review meetings,
  • Developing and implementing testing procedures to ensure quality control and reliability of FPGA-based solutions,
  • Working with technical specifications and standards (3GPP, ETSI, OpenRAN),
  • PCB-level integration with hardware, software, and driver developers.
  • Troubleshooting and debug FPGA-based systems,
  • Implementing of 5G stack (Low-PHY).

Job requirements

  • At least bachelor’s degree in electrical engineering/Telecommunications/Computer science or related scientific field,
  • At least 1 years of experience in FPGA developing,
  • Experience in FPGA design simulation and verification methods,
  • Experience in VHDL or Verilog programming languages,
  • Experience with AMD Xilinx, Altera, or other FPGA platforms,
  • Familiarity with system-level design and integration,
  • Strong problem-solving and troubleshooting skills,
  • Effective communication and teamwork skills,
  • Good English skills (spoken and written).

Good to have

  • Experience in RF communication systems, Software-defined radio, and related technologies,
  • Experience in antenna arrays steering, beamforming, TDD waveforms,
  • Experience in C, C++, Python, MATLAB, Linux, Bash.
  • Embedded system design,
  • CI/CD and GIT,
  • ARM bare-metal firmware design.
  • Expertise in FPGA timing constraints and timing closure, clock domain crossing,
  • Experience with digital signal processing,
  • Knowledge of LTE/5G stack and standards,
  • Experience with high-speed protocol such as 10Gbit/s, 25Gbit/s 100Gbit/s (SFP+, QSFP+) Ethernet, PCIe, etc.


Job benefits

  • Competitive compensation - 5 000 - 13 000 PLN gross (UOP or B2B)
  • Opportunity to join a fast-growing team at the early stage,
  • On-site or hybrid work,
  • Healthcare & Sport packages,
  • Flexible working hours,
  • Integration events,
  • Great coffee and atmosphere 😊.

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